De browserversie die u gebruikt, wordt niet aangeraden voor deze site.Overweeg up te graden naar de nieuwste versie van uw browser door op een van deze koppelingen te klikken.
Deze pdf is alleen beschikbaar als download.
Data Plane Packet Processing Embedded Intel® Architecture: PaperExecutive SummaryData plane packet processing involves moving data from an I/O device to system memory, classifying the data, then moving the data to a destination I/O device as quickly as possible. At the high speeds of modern communication, this puts pressure on the system bus as data is moved between I/O devices, system memory, and the processors classifying the data. This application is made even more challenging under a distributed memory architecture, where minimal and deterministic I/O latency must be ensured. This paper describes techniques that can be used to overcome these technical challenges and achieve high-performance data plane packet processing on embedded Intel® architecture platforms.The Intel® Embedded Design Center provides qualified developers with web-based access to technical resources. Access Intel Confidential design materials, step-by step guidance, application reference solutions, training, Intel’s tool loaner program, and connect with an e-help desk and the embedded community. Design Fast. Design Smart. Get started today. www.intel.com/embedded/edc.Read the full Data Plane Packet Processing Embedded Intel® Architecture White Paper.
Intel® technology is ideal for cryptography, transcoding, and intrusion detection. (March 2009)
Embedded processor platform extends life-cycle support and improves application performance.
Explains virtualization fundamentals, business impact, industry factors, model comparisons, and more.
Demos how virtualization and manageability improve network efficiency; Portuguese subtitles.
Explores Intel® Virtualization Technology, how it works, and common virtualization techniques.
Telecommunications computing architecture for industrial and military use. (v.1, Feb. 2011)